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Back End Major Projects
Sl.No Project Code Transistor Logic Projects Action
1 TVMABE01 Design Of Area-efficient And Highly Reliable Rhbd 10t Memory Cell For Aerospace Applications View Details
2 TVMABE20 Hybrid Logical Effort For Hybrid Logic Style Full Adders In Multistage Structures View Details
3 TVMABE03 Low-power And Fast Full Adder By Exploring New XOR And XNOR Gates View Details
4 TVMABE14 Parametric And Functional Degradation Analysis Of Complete 14-nm FinFET SRAM View Details
5 TVMABE05 A Very Compact CMOS Analog Multiplier For Application In CNN Synapses View Details
6 TVMABE18 A 7t Security Oriented SRAM Bitcell View Details
7 TVMABE28 Analysis Of Adiabatic Flip-flops For Ultra Low Power Applications View Details
8 TVMABE07 Counter Based Low Power, Low Latency Wallace Tree Multiplier Using GDI Technique For On-chip Digital Filter Applications View Details
9 TVMABE19 Energy Efficient Single-ended 6T SRAM For Multimedia Applications View Details
10 TVMABE30 Power-delay-product, Area And Threshold-loss Analysis Of CMOS Full Adder Circuits View Details
11 TVMABE09 Design Of Area Efficient And Low Power 4-bit Multiplier Based On Full- Swing GDI Technique View Details
12 TVMABE33 Power Reduction In Domino Logic Using Clock Gating In 16nm CMOS Technology View Details
13 TVMABE37 Power Efficient Design Of Adiabatic Approach For Low Power VLSI Circuits View Details
14 TVMABE39 Low Power Approximate Unsigned Divider Design Using Gate Diffusion Input Logic View Details
15 TVMABE41 Design Of Swing Dependent XOR-XNOR Gates Based Hybrid Full Adder View Details
16 TVMABE26 Seda - Single Exact Dual Approximate Adders For Approximate Processors View Details
17 TVMABE62 Radiation-hardened 14t SRAM Bitcell With Speed And Power Optimized For Space Application View Details
18 TVMABE74 All-Digital CMOS Time-to-Digital Converter With Temperature-Measuring Capability View Details
19 TVMABE65 Very Fast, High-Performance 5-2 and 7-2 Compressors in CMOS Process for Rapid Parallel Accumulations View Details
20 TVMABE71 Design and Analysis of Voltage Controlled Oscillators in 45nm CMOS Process View Details
21 TVMABE73 Anti-PVT-Variation Low-Power Time-to-Digital Converter Design Using 90-nm CMOS Process View Details
22 TVMABE43 Power and delay optimization of domino Schmitt trigger configurations with enhanced hysteresis voltage View Details
23 TVMABE46 A Low Power High Speed Comparator for Precise Applications View Details
24 TVMABE51 A Sub-Threshold Differential CMOS Schmitt Trigger with Adjustable Hysteresis Based on Body Bias Technique View Details
25 TVMABE56 Energy and Error Analysis Framework for Approximate Computing in Mobile Applications View Details
26 TVMABE59 A Modified Gate Diffusion Input Technique Based Proficient 4 Bit Priority Encoder View Details

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